Identification of critical primitive path delay faults without any path enumeration

Kyriakos Christou, Maria K. Michael, Stelios Neophytou

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

It has been previously shown that in order to guarantee the temporal correctness of a circuit, only the primitive path delay fault set needs to be tested. However, as in the case of the traditional and simpler path delay fault model, the number of possible faults can be exponential to the circuit size and, therefore, it is only practical to consider the set of critical faults. This work defines critical primitive path delay faults and presents an exact algorithm to identify them, using zero-suppressed binary decision diagrams and newly introduced operators necessary for handling multiple path delay faults. We report the number of critical primitive path delay faults for various criticality thresholds under the bounded delay model. The results indicate that only a small, but still necessary, number of multiple (primitive) faults, which escape testing under the singly testable fault criterion, must be considered in order to guarantee the timing correctness of the circuit.

Original languageEnglish
Title of host publicationProceedings - 28th IEEE VLSI Test Symposium, VTS10
Pages9-14
Number of pages6
DOIs
Publication statusPublished - 2010
Event28th IEEE VLSI Test Symposium, VTS10 - Santa Cruz, CA, United States
Duration: 19 Apr 201022 Apr 2010

Other

Other28th IEEE VLSI Test Symposium, VTS10
CountryUnited States
CitySanta Cruz, CA
Period19/04/1022/04/10

Keywords

  • Critical delay faults
  • Delay test
  • Path delay faults
  • Primitive faults
  • Zero-suppressed BDDs

Fingerprint Dive into the research topics of 'Identification of critical primitive path delay faults without any path enumeration'. Together they form a unique fingerprint.

  • Cite this

    Christou, K., Michael, M. K., & Neophytou, S. (2010). Identification of critical primitive path delay faults without any path enumeration. In Proceedings - 28th IEEE VLSI Test Symposium, VTS10 (pp. 9-14). [5469629] https://doi.org/10.1109/VTS.2010.5469629