Utilizing shared memory multi-cores to speed-up the ATPG process

Stavros Hadjitheophanous, Stelios N. Neophytou, Maria K. Michael

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

A new test generation methodology is proposed that takes advantage of shared memory multi-core systems. Appropriate parallelization of the main steps of ATPG allocates resources in order to minimize workload duplication and multi-threading race contention, often encountered in parallel implementations. The proposed approach ensures that the obtained acceleration grows linearly with the number of processing cores and, at the same time, keeps the test set size close to that obtained by serial ATPG. The experimental results demonstrate that the proposed methodology achieves higher degree of speed-up than comparable state-of-the-art multi-core based tools, while maintains similar test set sizes.

Original languageEnglish
Title of host publicationProceedings - 2016 21st IEEE European Test Symposium, ETS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Volume2016-July
ISBN (Electronic)9781467396592
DOIs
Publication statusPublished - 22 Jul 2016
Event21st IEEE European Test Symposium, ETS 2016 - Amsterdam, Netherlands
Duration: 23 May 201626 May 2016

Other

Other21st IEEE European Test Symposium, ETS 2016
CountryNetherlands
CityAmsterdam
Period23/05/1626/05/16

Keywords

  • ATPG
  • Multi-core systems
  • Parallel Processing

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  • Cite this

    Hadjitheophanous, S., Neophytou, S. N., & Michael, M. K. (2016). Utilizing shared memory multi-cores to speed-up the ATPG process. In Proceedings - 2016 21st IEEE European Test Symposium, ETS 2016 (Vol. 2016-July). [7519328] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ETS.2016.7519328